To address and resolve the delay issue caused by Ripple Carry Adder (RCA) for the addition of bigger numbers, we choose different types of adders. One of them is Carry Save Adder.

Carry Save Adder: To minimise the delay of the adder in addition of more than 4 bits, let’s say 8 bits, we use Carry Save Adder.

It is a combination of 4 bit RCA, but instead of waiting for Carry from lower nibble, the higher nibble calculates the Sum in two ways

(i) By assuming Carry 0

(ii) By assuming Carry 1

Finally, when the Carry arrives, that Carry is used to select the correct sum using multiplexers. The Carry from lower nibble is used as a select line for multiplexers. It is also called Carry Select Adder.

In this, we use two types of 2:1 multiplexers.

(i) 1-bit 2:1 mux to select Carry out

(ii) 4-bit 2:1 mux to select higher nibble sum.

In the above block diagram,

(a) s[3:0] is lower nibble

(b) s[7:4]is a higher nibble.

Program: Using Structural Modelling existing 4-bit Ripple Carry Adder modules. In this, we use two types of multiplexers

(i) 1-bit 2:1 mux

(ii) 4-bit 2:1 mux to multiplex Carry and Sum respectively.

module csad(
output [7:0]s,
output co,
input [7:0]a,b,
input ci);
wire c1,c2,c3;
wire [3:0]s1,s2;
rcad u1(s[3:0], c1, a[3:0], b[3:0], ci);
rcad u2(s1, c2, a[7:4], b[7:4], 1’b0);
rcad u3(s2, c3, a[7:4], b[7:4], 1’b1);
mux4b_2_1 u4(s[7:4], s1, s2, c1);
mux2_1 u5(co, c2, c3, c1);
endmodule

Multiplexers: The multiplexer module instances are used in above program. An exclusive post for all types of Multiplexers is here: Multiplexers

4-bit 2:1 Mux:

module mux4b_2_1(
output [3:0]y,
input [3:0]a,b,
input c);
assign y = c ? b : a;
endmodule

1-bit 2:1 Mux:

module mux2_1(
output y,
input a, b, c);
assign y = c ? b : a;
endmodule

Content Created: 26/06/2017
Content Updated: 03/08/2017.